Novena DVT to PVT ECO List
Contents
Novena DVT to PVT changes
This is a list of all the changes applied to the board from DVT1 to PVT1 release. If it's not on this list, it didn't happen.
Each change has the format of issue summary/resolution, and specific change
ECO1: Fix Gig-E termination
KSZ9021RN refclk output pull-up drive is weak. Terminate with a 300-ohm pull-up, instead of the proposed AC termination network.
| DVT | PVT | Notes |
|---|---|---|
| R20S 49.9, 1% / REC1005N | DNP | Gigabit ethernet |
| C16S 2200pF, X7R, 50V, 10% / CAPC1005N | DNP | Gigabit ethernet |
| added | 300, 1% / RES1005N | Gigabit ethernet |
ECO2: Remove FPGA clock termination
Use internal FPGA differential termination for clock. Electrically superior to discrete solution.
| DVT | PVT | Notes |
|---|---|---|
| R57B 100, 1% / REC1005N | DNP | FPGA |
ECO3: Clarify D14D orientation
Added fab note on bottom silkscreen layer (outside PCB but inside assy dwg) to indicate that D14D is a side-firing LED. Fab was orienting LED accidentally as vertically firing LED.
