Difference between revisions of "Novena headers to linux GPIO mappings"

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(Created page with "For reference, mapping of "extra" pins on Novena internal serial headers to GPIO pin numbers. The layout is like this: |-------------- | | d u | e a | b r | u...")
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Revision as of 13:27, 31 December 2015

For reference, mapping of "extra" pins on Novena internal serial headers to GPIO pin numbers.

The layout is like this: 

 |--------------
 |
 | d  u
 | e  a
 | b  r
 | u  t
 | g  4  <- pin 1/GND
 |
 | u
 | a
 | r
 | t
 | 3     <- pin 1/GND
 |


row closer to edge row closer to buttons
NC UART4_RTS - CSI0_DAT16
UART2_TXD - console UART4_TXD - senoko
UART2_RXD - console UART4_RXD - senoko
NC 3.3V (via diode)
NC UART4_CTS - CSI0_DAT17
GND GND
GPT_CAPIN1 - SD1_DAT0
UART3_TXD - EIM_D24
UART3_RXD - EIM_D25
3.3V (via diode)
GPT_CLKIN - SD1_CLK
GND
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