Difference between revisions of "Fernvale DVT1 to DVT2 ECO"
(Created page with "This is a list of all the changes applied to the board from DVT1 to DVT2. Each change has the format of issue summary/resolution, and specific change. ==ECO 1: Default to no JT...") |
(→ECO 1: Default to no JTAG) |
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| R10C 10k, 1% || R10C DNP || remove from BOM but leave footprint | | R10C 10k, 1% || R10C DNP || remove from BOM but leave footprint | ||
|} | |} | ||
| + | |||
| + | ==ECO2: Add MCINS to microSD== | ||
| + | There is a request to wire up the MCINS line on the microSD card. | ||
| + | |||
| + | Measurement on the Kaweei CTFD003-S-01-BC reveals that the MCINS behavior is as follows: | ||
| + | |||
| + | * MCINS pin is shorted to cage with no card inserted | ||
| + | * MCINS pin is floating when card is present | ||
| + | |||
| + | Therefore, we shall tie the cage to ground, and add a pull-up resistor on MCINS to P1.8VD (the I/O rail that MCINS is tied to; note it is different from the rest of the MC interface pins). | ||
| + | |||
| + | The pull-up is 4.7k. This is fairly strong, but the documentation shows there is a default PD on reset. We must overcome the default PD in this case. Therefore, with no card present, there will be an additional 400uA leakage on the P1.8V line. This resistor can be increased if we can confirm boot sequence can accurately detect presence of SD card without such a high-value resistor. | ||
| + | |||
| + | {| class="wikitable sortable" | ||
| + | |- | ||
| + | ! scope="col" | DVT1 | ||
| + | ! scope="col" | DVT2 | ||
| + | ! scope="col" | Notes | ||
| + | |- | ||
| + | | added || R17X 4.7k, 1% || | ||
| + | |} | ||
| + | |||
| + | In addition to the above BOM change, the board routing is modified to wire up MCINS. | ||
Revision as of 09:26, 5 February 2015
This is a list of all the changes applied to the board from DVT1 to DVT2.
Each change has the format of issue summary/resolution, and specific change.
ECO 1: Default to no JTAG
BPI_BUS(1,0) = 10 turns on JTAG over SD card pins, making SD inoperable.
Remove R10C, which allows internal pull-down in MT6260 to set BPI_BUS(0,0) = 00, which indicates no JTAG at all.
| DVT1 | DVT2 | Notes |
|---|---|---|
| R10C 10k, 1% | R10C DNP | remove from BOM but leave footprint |
ECO2: Add MCINS to microSD
There is a request to wire up the MCINS line on the microSD card.
Measurement on the Kaweei CTFD003-S-01-BC reveals that the MCINS behavior is as follows:
- MCINS pin is shorted to cage with no card inserted
- MCINS pin is floating when card is present
Therefore, we shall tie the cage to ground, and add a pull-up resistor on MCINS to P1.8VD (the I/O rail that MCINS is tied to; note it is different from the rest of the MC interface pins).
The pull-up is 4.7k. This is fairly strong, but the documentation shows there is a default PD on reset. We must overcome the default PD in this case. Therefore, with no card present, there will be an additional 400uA leakage on the P1.8V line. This resistor can be increased if we can confirm boot sequence can accurately detect presence of SD card without such a high-value resistor.
| DVT1 | DVT2 | Notes |
|---|---|---|
| added | R17X 4.7k, 1% |
In addition to the above BOM change, the board routing is modified to wire up MCINS.
